Re: UDRC-II holding PTT on during reboot

Jeremy McDermond <mcdermj@...>

On Nov 28, 2016, at 2:53 PM, VK3IL <david@...> wrote:

UDRC-I is quite different on PTT. It has a single PTT line (also on GPIO 12), but does not have any buffer transistor. In UDRC-II, there are 2 separate PTT lines buffered with transistors on GPIO 12 and GPIO 23.

That has made me wonder though if the on chip pull-up on this line has been left active in UDRC-II (which would have been necessary in UDRC-I) ? This would trigger the symptoms I am seeing due to the inverting action of the transistor buffer, The pull-up state transcends power down and so would explain the behaviour I suspect.
The pull-up/down resistors on the chip are only active when the pin is in input mode. The firmware on the UDRC tries to set up the pin so that you don’t get this behavior, but unfortunately I haven’t been able to make it work out correctly. This is a problem that we are aware of and it’s on my long list of things to do to try to find a workaround for folks. Unfortunately part of this is hardware based because the Broadcom chip itself has defaults that don’t come up quite right. I wish I could give you a better answer.


Jeremy McDermond

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