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The DRAWS™ board builds on the success of its predecessor the UDRC and uses the same audio CODEC chip.  This chip is the Texas Instruments TLV320AIC3204 (AIC3204). It was chosen because of its high sampling rate and its variety of sample formats.  It is capable of sampling rates of up to 96ksps and providing 32bit samples.  The most useful guide for documentation on this chip is TI publication SLAA557, the TLV320AIC3204 Application Reference Guide.

Unfortunately with such flexibility also comes complexity.  The input and output controls of the AIC3204 can be quite complex.  This document intends to explain some of the signal path settings directly applicable to the deployment of the DRAWS™ board in amateur radio applications.

Digital Interfaces

The DRAWS™ board uses two interfaces to the Raspberry Pi, I2C and I2S.  I2C is used for control functions of the AIC3204 chip and is shared with other chips on the DRAWS™ such as the serial interface to the GPS and the Analog to Digital Converter.  It performs such functions as setting sample rates and changing chip parameters based on user settings in the ALSA mixer panel.

The I2S bus is the data bus for the AIC3204.  It provides both input and output samples to the codec.  Because this bus is clocked with a single clock, the input and output sample rate must always be the same.  This means that it is impossible for a DRAWS™ board to use, for example, a 48k sample rate on transmit and a 24k sample rate on receive.  This is a function of the hardware bus used.  Also note that I2S is a point-to-point bus and really can only support a single audio chip.  There are some interesting configurations that can be done with Time Division Multiplexing where different CODECs can use different slots on the bus, the DRAWS™ drivers are not set up to support this.  Additional audio interfaces are only available with USB devices.

Both the I2C and I2S busses are connected to hardware components on the Raspberry Pi's Broadcom SoC.  No bit banging is involved in their operation.  The drivers for both busses are provided by the Raspberry Pi foundation and while NWDR personnel are keenly interested in their performance, we do not have a great deal of control over them.  Conversely, NWDR has contributed to the development of the AIC3204 driver and routinely improves its performance and features.

Analog Interfaces

Analog Routing Diagram

TI publishes an analog routing diagram in the application guide that may be useful for some people in the following discussion about the input and output configurations:

Input Configuration

The AIC3204 chip has three sets of input pins feeding into its analog to digital converters (ADCs).  There are left and right pins for each of three inputs labelled IN_1, IN_2 and IN_3.  The chip also has a pair of ADCs that provide digital samples to the digital side of the chip.  Each of the input pins can be routed to a variety of places on the chip.  For example, the IN_1 Left pin can be routed to the following locations:

  • Left ADC Positive Terminal
  • Right ADC Negative Terminal

Note that each input pin can be routed to multiple destinations at once.  For example, the IN1L pin described above can be simultaneously routed to the Left ADC Positive terminal and the Right ADC Negative terminal.  Each pin also has a configurable inline resistor with the pin to its destination.  This resistor can be either 10kΩ, 20kΩ or 40kΩ.  The intent of the chip designers is that one can use these resistors as a primitive mixer from each of the sources into the ADC.

Each of the signal paths has a separate setting on the ALSA mixer where you can set the resistor value on the path or turn that path off.  For example, there is a mixer control named "IN1_L to Left Mixer Positive Resistor."  This controls the resistor on the path from IN1_L to the Left Mixer Positive terminal.  Note that this configuration setup allows for esoteric setups by advanced users such as using pairs of input pins to create differential inputs.  Such usage is not officially supported by NWDR and only mentioned here as a curiosity for intrepid explorers.

The DRAWS™ board wires all of the "L" pins to the left DIN-6 connector and all the "R" pins to the right DIN-6 connector.  The IN1 pins are wired to the "9600 baud" or "discriminator" pin on the DIN-6, and the IN2 pins are wired to the "1200 baud" or "audio" pin on the DIN-6.  Please note that IN3 is not used or connected anywhere on the DRAWS™.

There are also controls for the "CM_L" and "CM_R" pins.  These are not physical pins, but represent the ground on the chip and are used for single-ended configurations.  In normal DRAWS™ use these pins should always be connected.

The input levels of both of the ADCs are controlled by the "ADC Level" control in ALSA.  This control is variable from 20dB to -12dB in half dB steps.  Note that these dB values are from the datasheet and are not arbitrarily calculated by ALSA or the driver author.

Note there is a "Mic PGA" control that addresses the Programmable Gain Amplifier in front of both of the ADCs.  While usage of this amplifier is not disabled, NWDR has not found any extra gain necessary in the input path of the DRAWS™ and discourages its use.  We recommend that you turn it off by setting the appropriate control in ALSA mixer.

If a connector is not in use, it's recommended to turn off all of its inputs to the ADC.  This will help eliminate crosstalk.

Output Configuration

Like on the input side, the output side of the AIC3204 is flexible and mildly complex.  On the output of the Digital to Analog Converters (DACs) are a selection of a pair of amplifiers, LO or "Line Out" and HP or "Headphones."  DRAWS™ simplifies this configuration somewhat and only connects the LO amplifier to output pins.  The HP amplifier is not used and the pins are not brought out of the AIC3204 chip on the DRAWS™ board.

There is an ALSA control labelled "LO DAC" that connects the DAC to the LO amplifier.  Unless used in a listen-only application, this switch should always be in the "on" position.

The other controls are labelled "LOL Output" and "LOR Output."  These controls enable the left and right outputs of the amplifier respectively.  The UDRC™ brings these pins out to the left and right DIN-6 connectors respectively on the "Data In" or "Transmit Audio" pin.  If one of the connectors is not in use, it is recommended to turn off the corresponding output pin.  This will help eliminate crosstalk.

The most complex output audio controls concern the output levels.  There are a plethora of controls which all interrelate to determine the output voltage at the terminals.  The first is the "LO Playback Common Mode" control.  This controls has two positions, "1.64V" and "Full Chip CM".  This control determines the power supply of the LO amplifier.  Full Chip common mode voltage is 0.9V.  This means that with the control in the "Full Chip CM" position that waveforms can only swing a maximum of 0.9V in either direction.  This means that the maximum amplitude waveform is 1.8V peak-to-peak.  Conversely in the "1.64V" position the maximum voltage swing is 1.64V and therefore the maximum amplitude waveform is 3.28V.  This represents approximately the chip supply voltage of 3.3V.  It is recommended that unless increased voltage output is necessary that the "Full Chip CM" setting be used.  Most radios perform more than adequately with this setting.

The second set of important controls for output is the "DAC PowerTune" controls.  These are labelled "DAC Left Playback PowerTune" and "DAC Right Playback PowerTune" on the ALSA mixer and can have values of either PTM_P1, PTM_P2 or PTM_P3.  These controls determine the power mode of the LO Amplifiers.  This is normally used in the CODEC to reduce power consumption for the chip in low power situations, but can also be used to reduce output levels in the DRAWS™.  PTM_P3 is the highest power mode and will give the highest output level for a particular setting of the "LO Drive" and "PCM" controls.  PTM_P1 is the lowest power mode and will give the lowest output level for a particular setting of "LO Drive" and "PCM."  Empirical measurements by NWDR engineers have shown that for a full-scale input sine wave at 1kHz with "LO Drive" and "PCM" both set to 0dB, in PTM_P3 the output voltage is 1.48V peak-to-peak.  In PTM_P1 the output voltage is 330 mV peak-to-peak.  This control may be valuable for reducing drive levels into particular sensitive radios but has not yet been well tested.

The final controls are the "LO Drive" and "PCM" controls.  The PCM control determines the output level from the DAC.  Please note that this is a *digital* control and not an analog one.  The chip is essentially just multiplying input samples to the DAC by scaling values to change the output.  This means that for every 6dB you cut this control, you will lose 1 bit of resolution of your signal.  This will affect dynamic range and quantization noise in your signal.  While this control has the greatest output range, it's also the one you should consider adjusting last.

The LO drive control determines the gain of the LO amplifier.  This is an analog control and has no concerns about adding digital noise into the signal due to the reduction of bits discussed above.  This is the first control you should consider using in attempting to match the output level of your DRAWS™ to your radio.